In the article we created: GNU Autotools Definitive Tutorial for Beginners we show all the step by step example for you to generate a configure
in a standard way. And this file (configure
) after execution will generate a Makefile to consequently build a project and be properly installed/uninstalled on the system, as well as its examples, documentation and manual.
However, if you think the whole procedure is not necessary for your project (which may be simpler), you can directly create a Makefile on the nail quickly and you will get the same result.
A makefile is a file (by default called “Makefile”) containing a set of directives used by the make
build automation tool to generate a target/meta (install, uninstall, remove some files and others).
A makefile essentially contains variable assignments, comments and targets. Comments start with the character “#”.
You can use a text editor to write your Makefile, however, you need to be aware of the details, as Makefile generates errors even with spaces where it should be TAB. Let’s look at some lines:
main.cpp
, but it would be all binary to form the linker;make
command, the file will already understand;install
command;
At first weird, but this Makefile boils down to: c++ main.cpp -o programname
. The install
and clean
parameters are optional for building the program.
You can create several variables for the final product. In this example below, let’s say you want the parameters:
-g
(debug);-Wall
(so that the compiler reports warnings no matter how basic, but you want your program fully standardized with ISOCPP);-pthread
you will compile a graphical library and the linker needs this file separately;-export-dynamic
and finally this parameter, because in that case let’s say you are compiling with the gtkmm library.So in addition to the basic variables we saw in the basic example, the ending would look like this:
Note that this time OBJS tells the binaries, and if you only use the
make
command, it will not work, because the minimum TARGET for building the program is theall
parameter. The code files are inside a directory:src/
I create and use Makefiles daily, even created a command in Shell, do also, which generates one for me passing only the files as a parameter. The truth is that there are no secrets, just respect these basic rules. You can even decide on variable names and remember to use TAB below the TARGETS where the commands will be.
If you haven’t already, I suggest you take a look at the simple examples suggested by the GNU guys, that’s where I learned: https://www.gnu.org/software/make/manual/html_node/Simple-Makefile.html . The example files cited here can be found in the tutorial I made for Gentoo documentation at this link: https://wiki.gentoo.org/wiki/Basic_guide_to_write_Gentoo_Ebuilds.
Hugs!
makefile make gnu cpp linguagemc